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	Comments on: PSoC 4200M WDT Long Deep Sleep	</title>
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	<description>Engineering for the Internet of Things</description>
	<lastBuildDate>Fri, 24 Nov 2017 20:54:51 +0000</lastBuildDate>
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		<title>
		By: Alan Hawse		</title>
		<link>https://iotexpert.com/psoc-4200m-wdt-long-deep-sleep/#comment-4095</link>

		<dc:creator><![CDATA[Alan Hawse]]></dc:creator>
		<pubDate>Fri, 24 Nov 2017 20:54:51 +0000</pubDate>
		<guid isPermaLink="false">https://iotexpert.com/?p=4694#comment-4095</guid>

					<description><![CDATA[In reply to &lt;a href=&quot;https://iotexpert.com/psoc-4200m-wdt-long-deep-sleep/#comment-4089&quot;&gt;Jagir&lt;/a&gt;.

I am not totally sure where you found that block of code.... but... before I answered this comment I read which is a good Application Note on Power.
http://www.cypress.com/file/121271/download

There are two clock domains... the high speed clocks which are generated by 1) the ECO 2) the IMO 3) a pin.  The CPU and high speed peripherals will use less power when they are clocked slower.

The low speed domain is driven by 1) the ILO or 2) the WCO ...

I dont know if the chip uses less power with the WCO or the ILO.  For sure if you are using the WCO your should turn off ILO.

Obviously you should turn off the IMO if you are running on an ECO.

I THINK that the chip comes out of deep sleep with the IMO running... and you need to turn the ECO back on to make the BLE work right... so when it comes out of deep sleep it turns on the IMO ... then runs there until the ECO stabilizes.. then you switch to it.

In a BLE design you need the WCO to get the timing good enough to wakeup the chip in time for a connection interval.

The WCO low power mode just takes longer for the WCO to stabilize when the chip boots... after it boots you can go to the WCO low power.

I suppose I could try them...

Alan]]></description>
			<content:encoded><![CDATA[<p>In reply to <a href="https://iotexpert.com/psoc-4200m-wdt-long-deep-sleep/#comment-4089">Jagir</a>.</p>
<p>I am not totally sure where you found that block of code&#8230;. but&#8230; before I answered this comment I read which is a good Application Note on Power.<br />
<a href="http://www.cypress.com/file/121271/download" rel="nofollow ugc">http://www.cypress.com/file/121271/download</a></p>
<p>There are two clock domains&#8230; the high speed clocks which are generated by 1) the ECO 2) the IMO 3) a pin.  The CPU and high speed peripherals will use less power when they are clocked slower.</p>
<p>The low speed domain is driven by 1) the ILO or 2) the WCO &#8230;</p>
<p>I dont know if the chip uses less power with the WCO or the ILO.  For sure if you are using the WCO your should turn off ILO.</p>
<p>Obviously you should turn off the IMO if you are running on an ECO.</p>
<p>I THINK that the chip comes out of deep sleep with the IMO running&#8230; and you need to turn the ECO back on to make the BLE work right&#8230; so when it comes out of deep sleep it turns on the IMO &#8230; then runs there until the ECO stabilizes.. then you switch to it.</p>
<p>In a BLE design you need the WCO to get the timing good enough to wakeup the chip in time for a connection interval.</p>
<p>The WCO low power mode just takes longer for the WCO to stabilize when the chip boots&#8230; after it boots you can go to the WCO low power.</p>
<p>I suppose I could try them&#8230;</p>
<p>Alan</p>
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		<title>
		By: Jagir		</title>
		<link>https://iotexpert.com/psoc-4200m-wdt-long-deep-sleep/#comment-4089</link>

		<dc:creator><![CDATA[Jagir]]></dc:creator>
		<pubDate>Fri, 24 Nov 2017 03:56:57 +0000</pubDate>
		<guid isPermaLink="false">https://iotexpert.com/?p=4694#comment-4089</guid>

					<description><![CDATA[Thank you, Alan, for writing this article. It will be very much helpful for other engineers like me.
As per my point of view writing match value for each timer would be much easier than setting divider in .cydwr file to calculate deep sleep interval.
And one more question,  To implement deep sleep mode with the current consumption of uA I followed code but I did not get it, Will you please explain me about the use case of all 4 clock source(IMO, ECO, WCO. ILO). &#038; why we are controling them before &#038; after of deep sleep ?
 The code snippet I used is:

/* Reduce ECO frequency to 3 MHz */
   CySysClkWriteEcoDiv(CY_SYS_CLK_ECO_DIV8);
   CySysClkEcoStop();  /* Shutdown ECO to save power */
   CySysClkWcoStart();         /* Start the WCO clock */
   CySysPmDeepSleep();
   CySysClkSetLfclkSource(CY_SYS_CLK_LFCLK_SRC_WCO);       /* LFCLK is now driven by WCO */
   CySysClkWcoSetPowerMode(CY_SYS_CLK_WCO_LPM);      /* Switch WCO to the low power mode after 
   CySysClkIloStop();          /* To stop ILo clock source */
   CySysClkEcoStart(1);        /* Start ECO clock to start BLE stack */]]></description>
			<content:encoded><![CDATA[<p>Thank you, Alan, for writing this article. It will be very much helpful for other engineers like me.<br />
As per my point of view writing match value for each timer would be much easier than setting divider in .cydwr file to calculate deep sleep interval.<br />
And one more question,  To implement deep sleep mode with the current consumption of uA I followed code but I did not get it, Will you please explain me about the use case of all 4 clock source(IMO, ECO, WCO. ILO). &amp; why we are controling them before &amp; after of deep sleep ?<br />
 The code snippet I used is:</p>
<p>/* Reduce ECO frequency to 3 MHz */<br />
   CySysClkWriteEcoDiv(CY_SYS_CLK_ECO_DIV8);<br />
   CySysClkEcoStop();  /* Shutdown ECO to save power */<br />
   CySysClkWcoStart();         /* Start the WCO clock */<br />
   CySysPmDeepSleep();<br />
   CySysClkSetLfclkSource(CY_SYS_CLK_LFCLK_SRC_WCO);       /* LFCLK is now driven by WCO */<br />
   CySysClkWcoSetPowerMode(CY_SYS_CLK_WCO_LPM);      /* Switch WCO to the low power mode after<br />
   CySysClkIloStop();          /* To stop ILo clock source */<br />
   CySysClkEcoStart(1);        /* Start ECO clock to start BLE stack */</p>
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